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47 lines (44 loc) · 2.19 KB
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---
# TinyTapeout project information
project:
wokwi_id: 348090311521600082 # If using wokwi, set this to your project's ID
# source_files: # If using an HDL, set wokwi_id as 0 and uncomment and list your source files here. Source files must be in ./src
# - counter.v
# - decoder.v
# top_module: "seven_segment_seconds" # put the name of your top module here, make it unique by prepending your github username
# As everyone will have access to all designs, try to make it easy for someone new to your design to know what
# it does and how to operate it.
#
# Here is an example: https://github.com/mattvenn/tinytapeout_m_segments/blob/main/info.yaml
#
# This info will be automatically collected and used to make a datasheet for the chip.
documentation:
author: "DerekP" # Your name
discord: "" # Your discord handle
title: "FIFO buffer" # Project title
description: "A FIFO buffer that is 4 bits wide and 4 words deep" # Short description of what your project does
how_it_works: "The first data that goes in it the first that comes out." # Longer description of how the project works
how_to_test: "Start with clear low and the inputs low to reset, then add data to the input lines and pulse the read clock to add to FIFO. Pulse the write clock after you have read the data presented at the output." # Instructions on how someone could test your project, include things like what buttons do what and how to set the clock if needed
external_hw: "" # Describe any external hardware needed
language: "wokwi" # other examples include Verilog, Amaranth, VHDL, etc
doc_link: "" # URL to longer form documentation, eg the README.md in your repository
clock_hz: 0 # Clock frequency in Hz (if required)
picture: "" # relative path to a picture in your repository
inputs: # a description of what the inputs do
- clock
- reset
- none
- none
- none
- none
- none
- none
outputs:
- segment a # a description of what the outputs do
- segment b
- segment c
- segment d
- segment e
- segment f
- segment g
- none